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Automatic parallelization of sequential code : a simplified model

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dc.contributor.author Prepejchal, David W. en_US
dc.date.accessioned 2017-04-18T13:42:17Z
dc.date.available 2017-04-18T13:42:17Z
dc.date.issued 1986
dc.identifier.uri http://commons.lib.niu.edu/handle/10843/17463
dc.description.abstract The recent emphasis on pushing forth in an attempt to create a fifth-generation supercomputer has put most of the effort into designing the hardware required by such a machine. The speeds of such devices, which are largely parallel in their architectures, are phenomenal. In comparison, however, there have been few widely accepted successes in the development of a software structure to utilize the power these supercomputers offer. ... The purpose of this paper is not to produce a commercial alternative to the problem, but to outline some of the obstacles encountered and overcome in an attempt to produce a simple model of a software structure designed to automatically parallelize serial computer codes in a realistic machine. It is based on small-scale precepts, and in no way was intended to suggest a commercially feasible model. It does, however, introduce solutions to various problems universally encountered in designing a tightly-coupled multiprocessor system. en_US
dc.format.extent 27 unnumbered pages en_US
dc.language.iso en_US en_US
dc.publisher Northern Illinois University en_US
dc.rights NIU theses are protected by copyright. They may be viewed from Huskie Commons for any purpose, but reproduction or distribution in any format is prohibited without the written permission of the authors. en_US
dc.subject sequential code en_US
dc.title Automatic parallelization of sequential code : a simplified model en_US
dc.type.genre Dissertation/Thesis en_US
dc.type Text en_US
dc.contributor.department Department of Computer Science en_US
dc.description.degree B.S. (Bachelor of Science) en_US


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